ASIC Engineer
- Cisco
- 8 - 10 years
- Hyderabad
- 3 months ago
- Email to a friend
- Report this job
Job Description
Meet the Team
The Common Hardware Group (CHG) delivers the silicon, optics, and With ~2,100 employees across 16 countries, we design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Come join us and take part in shaping Ciscos ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry.
Your Impact
- Responsible for implementing the Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug and diagnostics needs of the designs.
- Responsible for development of innovative DFT IP in collaboration with the multi-functional teams, and play a key role in full chip design integration with the testability features coordinated in the RTL.
- Work closely with the design/design-verification and PD teams to enable the integration and validation of the Test logic in all phases of the implementation and post silicon validation flows.
- The job requires the candidate to have the ability to craft solutions and debug with minimal mentorship.
You are an ASIC Design for Test Hardware Engineer with 8-10 years of related work experience with a broad mix of technologies.
Minimum Qualifications:
- Bachelors or a Master s Degree in Electrical or Computer Engineering required with at least 8-10 years of experience.
- Knowledge of the latest innovative trends in DFT, test and silicon engineering.
- Experience with Jtag protocols, Scan insertion and ATPG.
- Experience with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets.
- Knowledge of the latest innovative trends in DFT, test and silicon engineering.
- Experience working with Gate level simulation, debugging with VCS and other simulators.
- Post-silicon validation and debug experience; Ability to work with ATE patterns, P1687
- Strong verbal skills and ability to thrive in a multifaceted environment
- Scripting skills: Tcl, Python/Perl.
Preferred Qualifications:
- Test Static Timing Analysis
- Post silicon validation using DFT patterns.
At Cisco, we re revolutionizing how data and infrastructure connect and protect organizations in the AI era and beyond. We ve been innovating
scale. Because our solutions are everywhere, our impact is everywhere.
We are Cisco, and our power starts with you.
Job Classification
Industry: IT Services & ConsultingFunctional Area / Department: Engineering - Hardware & NetworksRole Category: HardwareRole: Design Verification EngineerEmployement Type: Full timeContact Details:
Company: CiscoLocation(s): Hyderabad+ View Contact
Keyskills: Wireless JTAG DFT Networking Simulation Chip design Debugging Perl cisco Python
Fraud Alert to job seekers!
₹ Not Disclosed
Similar positions
Job Listings
We are in open beta version of website, please let us know if any issues, at: info(at)indigojobs.in