Memory Layout EngineerJob Summary
Seeking a Memory Layout Design Engineer with hands-on experience in SRAM compiler layout, FinFET technologies, and advanced nodes (TSMC 3nm/2nm or Samsung equivalent), including exposure to RF memory.
Key Responsibilities
Requirements
Good to Have

Keyskills: Finfet Memory Design TSMC 3nm SRAM
Capgemini Engineering combines, under one brand, a unique set of strengths from across the Capgemini Group: the world leading engineering and R&D services of Altran acquired by Capgemini in 2020 - and Capgemini's digital manufacturing expertise. With broad industry knowledge and cutting-edge ...