PCIe design Engineer @ VMware

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B.Tech/M.Tech in Electronics/VLSI Engineering with 12+ years of experience in VLSI design and architecture

Strong fundamentals in digital ASIC design, micro-architecture, and best RTL coding methods

Domain expertise in PCIe Gen5/6/7 and PIPE protocols

Knowledge of AMBA and serial protocols, DMA, memory organization, processors, and Silicon bring-up sequences

Strong design, Emulation, and Silicon debug skills

Customer support and timely solutions to design problems

Excellent communication and oratory skills

Expertise in Synthesis, constraints, timing closure, and equivalence checks (Formality/Conformal)

Experience in Lint/CDC/RDC tools

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